🛠 Tech Stack

💼 About This Role

You'll be part of a team building a groundbreaking LEO satellite IoT system at E-Space. You will verify complex digital designs for custom IP blocks and full-chip SoC levels. You'll drive functional and code coverage to ensure high-quality silicon.

🎯 What You'll Do

• Verify complex digital designs across custom IP blocks and SoC levels.
• Translate architecture specs into executable verification plans.
• Develop and maintain UVM-based verification environments.
• Debug issues using simulation, waveform analysis, and assertions.

📋 Requirements

• 5-10 years of ASIC verification experience.
• Deep expertise in SystemVerilog.
• Strong knowledge of VHDL for mixed-language environments.
• Hands-on experience with UVM verification methodologies.

✨ Nice to Have

• Advanced assertion-based or formal verification experience.
• Gate-level simulation, emulation, or FPGA prototyping experience.
• Experience scaling verification for large multi-project SoCs.