🛠 Tech Stack

💼 About This Role

You'll work on ASIC physical design flows to synthesize blocks and automate design checks. Your work will enable real-time video generation models and chain-of-thought reasoning agents. You'll be mentored by industry leaders.

🎯 What You'll Do

• Develop and run physical design flows for block synthesis
• Automate final design signoff checks
• Advise RTL design decisions for physical implementation
• Realize front-end designs in silicon

📋 Requirements

• Progress toward BS/MS/PhD in EE or CE
• Familiarity with high-speed digital logic
• Exposure to ASIC or SoC design concepts
• Familiarity with SystemVerilog, UVM, or Python

✨ Nice to Have

• Experience with transformer models or ML
• Knowledge of clocking and reset schemes
• Scripting in Python

🎁 Benefits & Perks

• 🏠 Housing support for relocation
• 🍱 Daily lunch and dinner in office
• 👨‍🏫 Direct mentorship from industry leaders
• 💼 12-week paid internship
• 🚀 Work on transformative AI hardware

📨 Hiring Process

[email protected]