Tech Stack

Description

You will own the technical bridge between simulation and silicon, validating high-speed links, control buses, and power rails in next-generation AI server systems. Drive SI modeling-to-measurement correlation, conduct system-level electrical validation, and build Python-based automation for test coverage. Your work directly accelerates AI hardware reliability.

Requirements

• B.S./M.S. in Electrical Engineering (M.S. preferred) with 10+ years in high-speed digital design or hardware validation
• Expert-level proficiency in Ansys HFSS/SIwave, Cadence Sigrity, or Keysight ADS
• Hands-on mastery of oscilloscopes, VNAs, and logic analyzers
• Deep knowledge of PCIe, IEEE 802.3 physical layers, I2C, SPI
• Programming fluency in Python or equivalent scripting languages

Responsibilities

• Drive SI simulation-to-measurement correlation for PCIe Gen5/6, DDR5, and 112G/224G Ethernet using S-parameters, TDR, and eye diagrams
• Develop EM models for PCB discontinuities, connectors, and vias in HFSS, Sigrity, or ADS
• Lead validation of control buses (I2C, SPI, eSPI, UART, SMBus) and power-on sequences
• Collaborate with SI, PI, and firmware teams to resolve link-training failures and electrical noise issues
• Author Hardware Validation Plans and build Python automation for data collection from lab equipment