Tech Stack

Description

You will develop microarchitecture and RTL for advanced ML/AI accelerator ASICs/SoCs, integrating silicon photonic technology to power next-generation AI workloads while keeping power low. Collaborate with architecture, verification, physical design, and software teams to realize high-performance, low-power designs.

Requirements

• 8+ years experience with Bachelor's or 6+ years with Master's in Electrical/Computer Engineering
• Experience in ASIC design with multiple successful tape outs
• Expertise with high-speed digital design techniques
• Expertise with power-efficient digital design techniques

Responsibilities

• Develop microarchitecture design and RTL for advanced ML/AI accelerator ASICs/SoCs including memory system and NoC
• Integrate silicon photonic communication and compute technology into digital accelerator design
• Collaborate with Architecture, Design Verification, Implementation, Photonic, Analog and Software teams
• Create design specifications and documentation
• Manage RTL implementation to achieve performant designs within project schedules