🛠 Tech Stack

💼 About This Role

You'll own the micro-architecture and RTL design of AI compute sub-system modules including SIMD and hardware execution engines. You'll drive custom ISA definition and implementation, collaborating with system architects on efficient C-kernels. This role offers the chance to impact cutting-edge generative AI hardware with a collaborative team.

🎯 What You'll Do

• Define micro-architecture for AI compute sub-system modules.
• Design and deliver high-performance, power-efficient RTL.
• Implement logic functions for efficient test and debug.
• Participate in silicon bring-up and validation.

📋 Requirements

• MS in EE/CE/CS with 12+ years of experience.
• Experience in micro-architecture and RTL development (Verilog/SystemVerilog).
• Exposure to Computer Architecture and Arithmetic.
• Good understanding of ASIC design flow including synthesis and timing analysis.

✨ Nice to Have

• Experience with floating point and integer arithmetic.
• Exposure to interconnect and bus interfaces.

🎁 Benefits & Perks

• 💰 Competitive compensation with equity and bonus.
• 🏢 Hybrid work model with 3 days onsite in Santa Clara.
• 🤝 Inclusive culture with respect and collaboration.