Tech Stack

Description

You will develop cutting-edge FPGAs and ASICs for space and ground infrastructures, working on advanced programs supporting U.S. National Security. Responsibilities include leading verification test plans, developing testbench infrastructure, and automating test case generation.

Requirements

• Bachelor's degree in electrical engineering, computer engineering, or computer science
• 10+ years of experience with design verification and test bench development
• Expertise in constrained random verification and coverage analysis
• Experience with scripting languages for automation
• Ability to work in a dynamic environment with changing needs

Responsibilities

• Digital ASIC verification at block and system level
• Lead and execute verification test plan development and milestones
• Develop SystemVerilog testbench infrastructure (UVM and non-UVM)
• Run regressions and achieve code and functional coverage closure
• Automate test case generation using Python and MATLAB