Tech Stack

Description

You will work on advanced development programs for U.S. National Security, designing and verifying next-generation FPGAs and ASICs for space and ground infrastructure. Collaborate in a fast-paced environment to rapidly iterate from concept to operational capability.

Requirements

• Bachelor's degree in EE, CE, or CS
• 8+ years of experience in design verification and test bench development
• Experience with constrained random verification
• Strong problem-solving and coding skills
• Ability to work in a dynamic environment with changing needs

Responsibilities

• Lead and execute verification test plans from beginning to end
• Develop SystemVerilog testbench infrastructure (UVM and non-UVM)
• Achieve code and functional coverage closure
• Automate test case generation using Python and MATLAB
• Contribute to pre-silicon verification, chip bring-up, and post-silicon validation