🛠 Tech Stack

💼 About This Role

You'll be the technical authority for Signal Integrity and Power Integrity of high-performance AI compute platforms at d-Matrix. You'll drive end-to-end SI/PI strategy for next-gen accelerators with 112G/224G SerDes and multi-chip modules. Your work is critical to translating innovative Digital In-Memory Computing architecture into stable, manufacturable hardware.

🎯 What You'll Do

• Drive SI/PI strategy for next-generation AI accelerators.
• Model and analyze complex multi-chip packages and interconnects.
• Design and optimize Power Delivery Network (PDN) for transient stability.
• Perform channel simulations with IBIS-AMI models and define loss budgets.

📋 Requirements

• MS/PhD in Electrical Engineering focusing on Electromagnetics or Signal Integrity.
• 12+ years in SI/PI design for high-performance networking, GPUs, or servers.
• Expert-level proficiency in Ansys HFSS, Cadence Sigrity, or Keysight ADS.
• Proven track record with 112G SerDes and high-speed memory architectures.

✨ Nice to Have

• Knowledge of PCB Material Science (glass weave, skin effect, copper roughness).
• Experience with Python or MATLAB for simulation data post-processing.
• Familiarity with OCP hardware specifications for AI modules.

📨 Hiring Process

Estimated timeline: 2-4 weeks · AI estimate

1. 1Recruiter Phone Screen· 30 min
2. 2Technical Interview· 60 min
3. 3Onsite Interview· 4 hours