Tech Stack

Description

As a Sr. RFIC Layout Designer at SpaceX, you will join a team working on advanced silicon projects for Starlink, the world's largest satellite constellation. You'll lead custom analog and RFIC layout, collaborating with cross-disciplinary teams to drive integration and performance in space and ground infrastructure.

Requirements

• Bachelor’s in EE/CE and 5+ years IC layout experience, or 8+ years without degree
• Strong analog layout skills
• Experience in advanced node IC layouts (22nm, 16nm, 7nm, 5nm or below)
• Experience in layout of circuits with frequencies up to 50GHz
• Experience with skill programming and scripting (Perl, Python)

Responsibilities

• Determine chip floor plan with IC designers and packaging engineers
• Perform custom RF and analog circuit layout with attention to matching and parasitic minimization
• Perform DRC, ERC, LVS checks and resolve errors
• Perform top-level layout integration with ESD structures and final tapeout
• Collaborate with EDA suppliers to trial new tools and generate guides