🛠 Tech Stack

💼 About This Role

You'll own the RTL to GDSII implementation for neural recording and stimulation SoCs at Neuralink. You'll ensure timing closure and signoff verification for cutting-edge brain-machine interfaces.

🎯 What You'll Do

• Synthesize, place, and route digital designs from RTL to GDSII
• Perform clock tree synthesis and detailed routing optimization
• Conduct physical signoff verification including LVS/DRC/PERC
• Develop automation scripts using Python, Perl, or Tcl

📋 Requirements

• B.S. in Electrical Engineering or Computer Science or equivalent
• 5+ years of experience in digital physical design and verification
• Expertise in RTL-to-GDSII flow with EDA tools
• Experience in signoff ECO flow and physical verification

✨ Nice to Have

• M.S. in Electrical Engineering or Computer Science
• Experience at advanced nodes (16nm and below)
• Experience with DFT and ATPG flows

🎁 Benefits & Perks

• 🧬 Equity (RSUs) for all full-time employees
• 🏥 Excellent medical, dental, vision (PPO plan)
• 🍽️ Meals provided
• 🏖️ Flexible time off
• 🚆 Commuter benefits

📨 Hiring Process

Estimated timeline: 2-4 weeks · AI estimate

1. 1Recruiter Screen· 30 min
2. 2Technical Interview· 60 min
3. 3On-site Interviews· 4 hours