Tech Stack

Description

In this role, you will develop cutting-edge next-generation ASICs for deployment in space and ground infrastructure, enabling global connectivity through the Starlink network. You'll work with cross-disciplinary teams to verify complex digital designs, contributing to pre-silicon verification, chip bring-up, and post-silicon validation.

Requirements

• Bachelor's degree in electrical engineering, computer science or computer engineering
• 2+ years of experience with design verification and test bench development
• Strong object-oriented programming knowledge
• Experience with constrained random verification
• Experience with scripting languages (e.g., Python) for automation

Responsibilities

• Digital ASIC verification at block and system level
• Write and review test plans, develop test harnesses and test sequences
• Develop SystemVerilog testbench infrastructure (UVM and non-UVM) for testing designs, including DSP blocks
• Execute test plans, run regressions, achieve code and functional coverage closure
• Automate test case generation using Python and MATLAB