🛠 Tech Stack

💼 About This Role

You'll play a critical role in ensuring the functional integrity, performance, and reliability of next-generation optical chips for a fast-paced startup backed by industry executives. You'll develop robust verification plans and collaborate with architects, designers, and customers to translate logic requirements into effective verification strategies.

🎯 What You'll Do

• Develop verification plans for complex digital and mixed-signal optical chip designs.
• Collaborate with architects and designers to translate logic requirements into verification strategies.
• Perform netlist-level simulations with SDF back-annotation for timing-accurate verification.
• Design scalable, reusable UVM-based environments for block- and system-level verification.

📋 Requirements

• Proven hands-on expertise in SystemVerilog for verification.
• Demonstrated experience with the UVM framework and modern verification environments.
• Direct knowledge of PCIe protocols and experience verifying digital logic for high-speed interfaces.
• Practical experience verifying RISC-V CPU designs within an ASIC context.

✨ Nice to Have

• Experience with constrained random testing, assertions, and transaction-level modeling.
• Familiarity with formal verification and compliance suites for RISC-V.
• Proactive in anticipating and mitigating design risks via coverage-driven verification.

🎁 Benefits & Perks

• 💰 Competitive cash compensation with stock option plan.
• 🏠 Relocation bonus and moving expenses coverage.
• 🏥 Healthcare coverage including family-friendly options.
• 🌴 25 days PTO plus public holidays.
• 🚇 50% reimbursement of public transport subscription fee.

📨 Hiring Process

Screening call, technical meeting, CEO interview, reference calls, technical assessment, final interview.