🛠 Tech Stack

💼 About This Role

You'll lead high-speed PCB layout for AI accelerator platforms, owning complex 20+ layer PCBA designs. You'll ensure pristine 112G/224G SerDes signal integrity and massive power delivery. This role offers the autonomy to build layout infrastructure from scratch at an innovative AI hardware company.

🎯 What You'll Do

• Lead layout for high-complexity AI accelerator cards and system baseboards.
• Architect and manage Cadence Allegro Constraint Manager hierarchy.
• Develop automation scripts (SKILL, Python, TCL) for layout tasks.
• Drive PCB stack-up definition with advanced low-loss materials.

📋 Requirements

• 12+ years of experience in high-speed, high-density PCB layout.
• Expert-level proficiency in Cadence Allegro Constraint Manager.
• Proven ability to write and deploy SKILL scripts for automation.
• Deep understanding of high-speed routing (back-drilling, via-in-pad).

✨ Nice to Have

• Experience establishing a Library Management System.
• Familiarity with PLM/PDM integration for layout releases.

🎁 Benefits & Perks

• 💰 Equity compensation
• 🏖️ Flexible hybrid work
• 🧬 Work on cutting-edge AI silicon
• ⚙️ Autonomy to build layout infrastructure

📨 Hiring Process

Estimated timeline: 2-4 weeks · AI estimate

1. 1Recruiter Screen· 30 min
2. 2Technical Interview· 60 min
3. 3On-site Interviews· 4 hours