🛠 Tech Stack

💼 About This Role

You'll develop UVM-based testbenches for satellite avionics FPGA designs and create coverage-driven verification plans. Your work ensures RTL correctness for flight-critical firmware across multiple subsystems. This role is instrumental in establishing a rigorous verification methodology for the program.

🎯 What You'll Do

• Develop UVM verification environments including agents and scoreboards.
• Write verification plans from requirements specifications.
• Create functional coverage models and drive coverage closure.
• Perform RTL simulation using industry-standard tools.

📋 Requirements

• Bachelor's or Master's in Electrical Engineering or related field.
• 4+ years experience in FPGA or ASIC verification.
• Strong expertise in SystemVerilog and UVM methodology.
• Experience building UVM agents and generating constrained-random stimulus.

✨ Nice to Have

• Experience verifying designs for space or aerospace applications.
• Familiarity with formal verification tools.
• Proficiency in Python, TCL, or shell scripting.