🛠 Tech Stack

💼 About This Role

You'll lead verification strategy for FPGA/SoC designs on AMD platforms for flight-critical avionics at Anduril. You will set technical direction for the verification team and own UVM-based methodology and coverage-driven verification.

🎯 What You'll Do

• Define UVM architecture and reusable verification component libraries
• Mentor verification engineers and review testbenches and verification plans
• Architect UVM environments for AMD FPGA/SoC designs
• Develop verification plans with traceability to system requirements
• Author SystemVerilog Assertions and build functional coverage models

📋 Requirements

• 7+ years of experience in FPGA/ASIC verification
• Proficient in SystemVerilog, UVM, and SVA
• Experience owning verification closure on a production program end-to-end
• Eligible to obtain U.S. Secret security clearance

✨ Nice to Have

• 10+ years of FPGA/ASIC verification experience
• DO-254 avionics verification standards experience
• Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI

🎁 Benefits & Perks

• 💰 Competitive equity grants included in most full-time offers
• 🏖️ Top-tier benefits at little to no cost to employees

📨 Hiring Process

Estimated timeline: 2-4 weeks · AI estimate

1. 1Recruiter Screen· 30 min
2. 2Technical Interview· 60 min
3. 3Onsite Interview· 4 hours