Tech Stack

Description

You will design, optimize, and implement low-latency advanced video compression algorithms for real-time video streaming applications, working closely with cross-functional teams to deliver high-quality wireless video.

Requirements

• Bachelor's or Master's in CS, EE, or related field
• Solid understanding of video compression theory and standards (H.264, H.265/HEVC, H.266, VP9, AV1)
• Experience with FPGA, ASIC, DSP hardware implementations
• Strong proficiency in C/C++ and SIMD optimizations
• Experience with GPU acceleration (CUDA, Vulkan, OpenCL)

Responsibilities

• Design dual CPU/GPU hybrid video compression encoder architecture
• Design, develop, and optimize video compression algorithms in C/C++, Assembly, Rust
• Implement and optimize encoder/decoder pipelines for real-time applications
• Analyze and improve codec performance across CPU, GPU
• Integrate CODEC solutions into products using FPGA/ASIC design flows