🛠 Tech Stack

💼 About This Role

You'll serve as a design verification SME for semiconductor deployments, helping teams reason about verification workflows. You'll shape AI-assisted verification workflows and curate evaluations with customer SMEs, with room to grow into a broader Forward Deployed Engineering role over time.

🎯 What You'll Do

• Act as design verification SME for semiconductor deployments
• Shape AI-assisted workflows for test generation and debug
• Curate evaluations with FDEs and customer SMEs
• Build lightweight prototypes and eval harnesses
• Educate and mentor FDE team on verification concepts

📋 Requirements

• 5+ years in design verification for complex IP/SoC
• Experience with SystemVerilog and UVM
• Hands-on expertise in VCS, Questa, or Verdi
• Strong knowledge of computer architecture and verification methodology

✨ Nice to Have

• Experience across multiple semiconductor companies
• Familiarity with RTL design, formal verification, or emulation
• Experience applying AI/LLM to semiconductor workflows

🎁 Benefits & Perks

• 💰 Competitive compensation with equity
• 🏥 Health benefits
• 🏖️ Flexible PTO
• 🚀 Opportunity to work with cutting-edge AI

📨 Hiring Process

Estimated timeline: 2-4 weeks · AI estimate

1. 1Recruiter Screen· 30 min
2. 2Technical Interview· 60 min
3. 3Hiring Manager· 45 min