Tech Stack

Description

You will develop cutting-edge next-generation ASICs for deployment in space and ground infrastructures, enabling connectivity globally. This role involves leading verification efforts from block to system level, contributing to pre-silicon verification, chip bring-up, and post-silicon validation.

Requirements

• Bachelor's degree in electrical engineering, computer engineering, or computer science
• 10+ years of experience with design verification and test bench development
• Experience with verification methodologies such as UVM/OVM/VMM
• Strong object-oriented programming knowledge
• Expertise in constrained random verification

Responsibilities

• Responsible for digital ASIC and/or FPGA verification at block and system level
• Lead and execute verification test plan, development, and milestones from beginning to end
• Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
• Be a hands-on self-starter who can execute the steps required to fully verify complex digital designs