Tech Stack

Description

You will design and develop microarchitectures for highly configurable IPs, perform RTL coding for optimal performance, power, and area, and collaborate with software and verification teams. Your work will shape our technology portfolio in the emerging chiplet era.

Requirements

• BS/MS in Electrical Engineering, Computer Engineering or Computer Science
• 8+ years hands-on experience in microarchitecture and RTL development
• Proficiency in Verilog, System Verilog
• Experience with large high-speed, pipelined, stateful, and low power designs
• In-depth understanding of on-chip interconnects, NoCs, and coherency protocols (ACE/CHI)

Responsibilities

• Design and develop microarchitectures for highly configurable IPs
• Microarchitecture and RTL coding for optimal performance, power, area
• Collaborate with software teams on configuration requirements and verification collaterals
• Work with verification teams on assertions, test plans, debug, coverage