Tech Stack

Description

As a Senior ASIC Package Design Engineer at K2 Space, you will define and implement advanced ASIC package architecture for high-performance mixed-signal and digital SoCs, focusing on flip-chip BGA and multi-chip module solutions. You will collaborate with internal teams to influence silicon and system architecture, ensuring first-pass success for complex, high-speed, power-dense ASICs.

Requirements

• Experience in advanced ASIC package design with focus on FC-BGA and MCM
• Strong knowledge of substrate stack-up, ball-map, power delivery, and signal breakout
• Expertise in PI, SI, thermal, and mechanical analysis for package design
• Ability to manage vendor relationships and drive qualification to production ramp

Responsibilities

• Define ASIC package architecture for FC-BGA and MCM solutions
• Lead package-level trade studies across cost, performance, PI, SI, thermal, manufacturability, and reliability
• Establish package design standards and influence silicon/system architecture
• Ensure first-pass success for high-speed, power-dense ASICs through vendor engagement and qualification