🛠 Tech Stack

💼 About This Role

You'll define and architect power domains within processor subsystems for a satellite IoT SoC, optimizing for ultra-low power consumption. Your work will directly impact the performance of our space-based IoT system.

🎯 What You'll Do

• Define and partition power domains for processor subsystems
• Develop power control sequencing and state machines
• Capture power intent using UPF and collaborate with teams
• Drive definition of low-power modes and system-level interaction

📋 Requirements

• Bachelor's or Master's in EE/CE or related field
• 7+ years experience in ASIC/SoC low-power architecture
• Deep hands-on experience with power domain definition and UPF
• Proficiency with RTL design using SystemVerilog or VHDL

✨ Nice to Have

• Experience with Arm Corstone or Cortex-M processor subsystems
• Knowledge of AMBA bus protocols
• Familiarity with power analysis tools like PrimeTime PX or Cadence Joules

🎁 Benefits & Perks

• 🚀 Cutting-edge space technology
• 🏖️ Flexible time off
• 💰 Competitive compensation
• 🏥 Health benefits

📨 Hiring Process

Estimated timeline: 3-6 weeks · AI estimate

1. 1Recruiter Call· 30 min
2. 2Technical Interview· 60 min
3. 3System Design Interview· 60 min
4. 4Offer· 30 min