Tech Stack

Description

You will drive the physical implementation of advanced RF and mixed-signal integrated circuits for next-generation satellite communication systems. This hands-on role focuses on layout execution and top-level integration to deliver high-performance silicon.

Requirements

• 5+ years of RF/analog/mixed-signal layout experience
• Extensive hands-on experience with advanced FinFET process technologies (≤16nm preferred)
• Proven track record of top-level SoC layout integration and successful silicon tapeouts
• Deep understanding of RF and analog layout techniques including high-frequency effects and parasitics
• Proficiency with industry-standard EDA tools

Responsibilities

• Execute high-quality layout for RF, analog, and mixed-signal blocks in advanced FinFET nodes
• Contribute to top-level layout integration including block placement, routing, power planning, floorplanning
• Ensure robust implementation of matching, symmetry, high-frequency routing, and parasitic control
• Drive full-chip physical signoff including DRC/LVS/ERC closure, EM/IR and reliability verification
• Own tapeout readiness and interface with foundry and EDA partners