9h ago
NPI Engineering Intern
Taiwan > Hsinchu
โจ $30k-$50k / yearest.
part-timeintern
๐ผ About This Role
You'll support research and analysis of advanced CMOS transistor behavior, focusing on channel materials and HKMG stacks. Your work will synthesize academic literature to guide device development. This role offers deep exposure to semiconductor R&D.
๐ฏ What You'll Do
- Conduct structured review of academic journals on advanced CMOS devices
- Analyze channel material properties impact on device performance
- Study interfacial layer scaling and HKMG stack effects
- Integrate findings across layers and document in reusable format
๐ Requirements
- Pursuing PhD in Electrical Engineering, Materials Science, or related field
- Strong foundation in semiconductor physics and device engineering
- Ability to analyze and synthesize complex technical literature
- Strong written communication skills in English
โจ Nice to Have
- Background in CMOS device physics or gate stack engineering
- Familiarity with high-k dielectrics or metal gate work function engineering
- Prior research experience in device, materials, or process technology
๐ Benefits & Perks
- ๐ฌ Hands-on experience with state-of-the-art device technologies
- ๐ค Close interaction with experienced engineers and researchers
- ๐ Deep exposure to device physics and gate stack engineering challenges
- ๐ Experience translating academic research into industrial R&D insights
๐จ Hiring Process
Estimated timeline: 2-4 weeks ยท AI estimate
- 1Recruiter Screenยท 30 min
- 2Technical Interviewยท 60 min
- 3Offerยท 15 min
0 0 0