22h ago

Design Verification Engineer

Austin, TX, United States; Boulder, Colorado, United States; Chicago, Illinois, United States; London, United Kingdom; New York, NY, United States

$175k-$250k / year

full-timemidfinance

๐Ÿ›  Tech Stack

๐Ÿ’ผ About This Role

You'll create testbenches and verification environments for FPGA and ASIC designs used in high-performance trading. You'll collaborate with designers to root-cause bugs and bring up new projects in a fast-paced, cutting-edge environment. This role offers the chance to contribute to open-source EDA tools like Verilator and Cocotb.

๐ŸŽฏ What You'll Do

  • Creating testbenches and tests for hardware platform
  • Writing detailed verification plans
  • Root-causing RTL bugs quickly
  • Collaborating with designers for bringup and debugging

๐Ÿ“‹ Requirements

  • 2+ years of RTL functional verification for FPGA or ASIC
  • Experience with SystemVerilog and UVM
  • Experience with code and functional coverage
  • Proficiency in Python

โœจ Nice to Have

  • Familiarity with Verilator or Cocotb
  • C++ experience

๐ŸŽ Benefits & Perks

  • ๐Ÿ’ฐ Competitive base salary and discretionary bonuses
  • ๐Ÿ–๏ธ Comprehensive benefits package
  • ๐ŸŒ Global office locations and collaborative culture

๐Ÿ“จ Hiring Process

Estimated timeline: 2-4 weeks ยท AI estimate

  1. 1Recruiter Screenยท 30 min
  2. 2Technical Phone Interviewยท 60 min
  3. 3On-site Interviewยท half-day
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